Electronically scanned phased array antennas offer significant advantages over mechanically scanned antennas in scan speed and multiple beam formation. A typical antenna array consists of thousands of radiating elements. Each element in the array requires its own phase shifter to generate a desired radiation pattern.
Prior designs of phase shifters can be categorized as:
1. hybrid circuits with discrete diodes; and
2. monolithic circuits, including
a. switched line/loaded line configuration PA1 b. quadrature couplers, and PA1 c. adjustable gate-width dual-gate FETs.
circuits,
Previous phase shifter designs have used discrete diodes bonded into hybrid circuits. They are discussed in a general sense in Microwave Semiconductor Engineering by J. F. White, 1982, pp. 389-495. These circuits require labor-intensive assembly, and therefore a prohibitive manufacturing cost. Because of the thousands of phase shifters required in one phased array antenna, minimizing costs is an important criterion in phase shifter design. A phase shifter fabricated as a monolithic microwave integrated circuit (MMIC) offers cost reductions in batch processing and minimized assembly steps.
Some of the previous monolithic phase shifter designs use the switched line and the loaded line configurations. For the switched line phase shifter, gallium arsenide Field Effect Transistors (FETs) are used to switch the input microwave signal onto one of two transmission lines. The relative lengths of these lines produce a phase shift difference of some desired amount (180.degree., 90.degree., etc.). The loaded line phase shifter uses a transmission line with an FET in series with an inductor to ground on each side of the transmission line. This technique works only for phase shift values of 45.degree. or less. Switched line and loaded line phase shift sections of these types are cascaded together to produce the desired phase resolution. A problem with both of these approaches is that they are limited to narrow bandwidths due to the use of transmission lines. Further, the phase error from the different sections is additive, causing undesired ripple.
A third type of design uses quadrature couplers with varactor diodes to ground on two ports, such as is described in U.S. Pat. No. 4,638,269. A control voltage varies the capacitance of the diode, which changes the phase of the signal reflected back into the coupler. Because this circuit produces a continuously variable phase shift, additional circuitry is required to generate analog control voltages. The drawbacks of this approach are reduced accuracy and decreased switching speed. In addition the full 0.degree. to 360.degree. range cannot be achieved.
A fourth existing phase shifter design (Y. K. Chen et al., "A GaAs Multi-Band Digitally-Controlled 0.degree.-360.degree. Phase Shifter," 1985 GaAs IC Symposium Digest of Technical Papers, p. 125-128) uses adjustable gate-width dual-gate FETs in a vector modulator to produce a phase shift from 0.degree. to 90.degree.. Separate sections are used to generate the 90.degree. and 180.degree. phase shifts necessary for four quadrant operation. Any deviation from 180.degree. phase difference in the active phase splitter produces phase error. Subsequent circuit elements can do nothing to compensate for this deviation.
The desired phase shift quadrant (for example 180.degree.-270.degree.) is selected by controlling the voltages on the second gates of four FETs biased as amplifiers. Impedance mismatches will be present between the outputs of these switch FETs and the inputs of the attenuator FETs. These mismatches lead to gain and phase ripple in the frequency band. An alternate approach is to use passive FET switches, but this would increase the overall insertion loss of the circuit.
Another portion of this same phase shifter consists of the 90.degree. phase shift networks. Each network is a resistor-capacitor circuit: one is a series combination; the other is a parallel combination. At the frequencies where a 90.degree. phase difference can be obtained, the insertion loss is high.
A disadvantage of a dual-gate FET operated as a switched amplifier becomes evident at frequencies greater than 5 gHz, where the on-to-off ratio achieved by second gate switching is limited to 30 dB or less. This causes large errors in both phase and amplitude.